Can Low-Power Transistors Shape The Future Of Electronics?

The potential of utilizing ferroelectric hafnia in developing low-power transistors has been showcased by incorporating a ferroelectric layer in the gate stack.

Transistors, essential in electronics, control current and enable smaller devices. Smaller transistors face energy challenges like short-channel effects and current leakage due to quantum tunneling. Ferroelectric materials’ negative differential capacitance (NDC) may reduce energy consumption. NDC is observed in ferroelectrics, where a charge change causes the voltage across the material to shift in the opposite direction. Hafnia (HfO2), a ferroelectric material, could be employed.

Researchers at the Samsung Advanced Institute of Technology, Samsung Electronics, Sungkyunkwan University and Jeonbuk National University have showcased the potential of utilizing ferroelectric hafnia to develop energy-efficient transistors. The ferroelectric layer in the gate stack reduces transistor operating voltage by increasing total capacitance compared to conventional stacks. 

Hafnia-based ferroelectric advances motivate transistor research for NDC effect integration. Limited studies show ultrathin hafnia in gate stack reduces transistor energy usage. The researchers stated that there is little evidence of the electrical benefits of NDC on scaled silicon-based transistors. Their primary objective was to demonstrate the observability of NDC in scaled silicon-based structures and investigate its potential for effective utilization in the development of advanced low-power logic devices. The team created hafnia films similar to gate stack films in commercial devices. They have achieved ultrathin ferroelectric hafnia films under 2nm.

NDC was explored in Metal-Oxide-Semiconductor Capacitors (MOSCAPs) with ultrathin ferroelectrics (1 nm thickness). Direct observation of NDC through polarization-electric field relation. The researchers tested NDC tunability and durability over time. They have demonstrated improved field effect transistor (FET) performance by adding 2nm film to the FinFET gate stack. The team’s findings demonstrate the potential of NDC-based low-power logic devices. The experimental proof is shown with ultrathin hafnia, applicable to other ferroelectric materials. Electrical measurements complemented by simulations. In-depth analyses were conducted to measure layer thickness and atomic composition, ensuring robustness and ruling out high-k effects. The team’s NDC approach for compact transistors is structural modification-free and compatible with 3D architectures, enabling scalable implementation.

The team successfully demonstrated the potential of ferroelectric hafnia as a promising material for implementing NDC FETs. Their next objective is to identify and optimize specific parameters or factors that can maximize the performance enhancement of NDC. This involves uncovering the precise mechanism of NDC in polycrystalline ferroelectrics, including ferroelectric hafnia, as the current NDC model is designed for single-crystal ferroelectrics.

Reference : Sanghyun Jo et al, Negative differential capacitance in ultrathin ferroelectric hafnia, Nature Electronics (2023). DOI: 10.1038/s41928-023-00959-3